8a666f7dfc
update lips
2015-12-17 07:28:30 -08:00
00ea5183a2
ignore more stuff
2015-12-17 07:28:12 -08:00
e29199c9e0
add asm injection scripts
2015-12-16 18:04:57 -08:00
c142d4df33
redo headers
2015-12-16 03:19:34 -08:00
9af8b79ac2
add pt
2015-12-16 02:55:20 -08:00
6bb341437b
describe Lua scripts
2015-12-16 02:53:31 -08:00
b29bad17cc
disable this until i bother writing a 5.3 bit op wrapper
2015-12-11 00:45:22 -08:00
bafaa7a1af
update for new gui.text behaviour
2015-12-11 00:44:18 -08:00
a957617933
useless update
2015-12-11 00:43:39 -08:00
c450e7b535
fix actor lister
2015-12-11 00:41:57 -08:00
cfd57b391b
Revert "Revert "update for new readbyterange behaviour""
...
This reverts commit adab471173
2015-12-11 00:38:50 -08:00
a087f2bff0
don't unpause the game if it wasn't already
2015-12-11 00:36:29 -08:00
9ea38f25be
add an observatory flag
2015-12-11 00:34:02 -08:00
fcbedca20f
remove read-3/write-3 functions
2015-12-03 02:50:31 -08:00
b2817c9b5c
implement m64p ROM reading and such
2015-12-03 02:06:18 -08:00
9cd5ea9007
reorganize JP text commands and stuff
2015-11-29 16:06:22 -08:00
8fa3e81a67
add half-baked text dumper for OoT
2015-11-29 06:15:03 -08:00
8f0b64f287
specifically use python 3
2015-11-29 06:13:42 -08:00
90d30e218f
support both bizhawk and m64p
2015-11-28 15:39:19 -08:00
fdbcc5d527
remove luanet crap
2015-11-27 21:37:48 -08:00
44fdfdb684
basic mupen64plus support
2015-11-27 08:48:47 -08:00
433a99cb43
misc monitor tweaks
2015-11-25 03:02:21 -08:00
577d4a5b4f
move assembler to https://github.com/notwa/lips
2015-11-22 13:40:01 -08:00
7bd3e81713
ignore highest bit of .org directive
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are you *really* gonna be assembling files over 2GiB?
2015-11-22 13:30:11 -08:00
3cc511182a
handle immediates in place of most offsets
2015-11-22 13:28:47 -08:00
86ce3ea0d7
reimplement parsing; resolve defines after lexing
2015-11-22 12:30:55 -08:00
d808160d68
tokenize all at once (WIP)
2015-11-22 02:46:38 -08:00
1b23db1a71
unfudge LI/LA a little
2015-11-22 00:24:28 -08:00
5b35cc2155
use proper instruction type names
2015-11-22 00:09:54 -08:00
9ec4d0f406
add reg# register aliases
2015-11-21 23:50:25 -08:00
cdeb4b0489
pseudo-instruction crap
2015-11-21 19:30:02 -08:00
f673308437
various
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fix jump and branch destinations.
note: branching is no longer compatible with CajeASM.
make LUI dumb: only use 'UPPER' with LI/LA.
note: this is very incompatible with CajeASM.
add LUUI pseudo-instruction to use 'UPPER' instead of 'LOWER'.
fix SUBI/SUBIU parsing.
fix LI for values under 0x10000.
pass filename through main().
tell Lexer our filename.
don't print filename in Dumper since it's irrelevant.
2015-11-21 17:35:43 -08:00
4a45b3c913
implement LI and LA
2015-11-21 15:36:54 -08:00
5397085f01
various
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alias ZERO register to R0.
lex decimal numbers properly.
lex octal and negative numbers.
lex directives properly.
fix byte dumping.
fix UPPER behavior...?
2015-11-21 15:04:30 -08:00
39ffd10fff
new dumper to support directives
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the old one could still have a place,
with its simplicity and speed.
also, screw versioning.
2015-11-21 13:53:52 -08:00
70827cd830
simplify size handling
2015-11-21 00:01:15 -08:00
88b230d3c7
define formats in the instruction table
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this greatly reduces code bloat,
and made it easier to implement a few instructions.
everything is still very untested, however.
2015-11-20 23:29:57 -08:00
29de0e8d53
only specify one instruction list
2015-11-20 20:45:59 -08:00
70e4d28442
add remaining fp instructions
2015-11-20 20:26:30 -08:00
bfcd75f5b6
add fp compare instructions
2015-11-20 19:36:52 -08:00
05c3a18886
use filename in errors; fix JALR
2015-11-20 16:44:40 -08:00
3b92aad4a0
set up as a proper module
2015-11-20 16:21:13 -08:00
cd8ea7b3d7
refactor to use classes; no hardcoded stuff
2015-11-20 15:27:22 -08:00
ebc9987a38
implement relative branches; fix register orders
2015-11-20 15:01:04 -08:00
cf413a7ab1
a little cleanup
2015-11-20 14:12:02 -08:00
5822b592f1
add basic fp arithmetic
2015-11-20 14:00:02 -08:00
301bfc99f8
add fpu registers and basic moves
2015-11-20 13:28:10 -08:00
8407c4e016
recognize pseudo & fp instructions
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i hope this is all of them.
2015-11-20 12:49:26 -08:00
c9671ef4b5
add semi-functional MIPS assembler
2015-11-20 11:53:09 -08:00
0f59cdce5e
race tweaks
2015-11-15 20:04:49 -08:00
