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add reg# register aliases

This commit is contained in:
Connor Olding 2015-11-21 23:50:25 -08:00
parent cdeb4b0489
commit 9ec4d0f406

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@ -30,7 +30,6 @@ local Class = function(inherit)
return setmetatable(class, mt_class) return setmetatable(class, mt_class)
end end
-- TODO: maybe support reg# style too
local registers = { local registers = {
[0]= [0]=
'R0', 'AT', 'V0', 'V1', 'A0', 'A1', 'A2', 'A3', 'R0', 'AT', 'V0', 'V1', 'A0', 'A1', 'A2', 'A3',
@ -77,10 +76,15 @@ revtable(fpu_registers)
revtable(all_registers) revtable(all_registers)
revtable(all_directives) revtable(all_directives)
registers['ZERO'] = 0 registers['ZERO'] = 0
all_registers['ZERO'] = 0 all_registers['ZERO'] = 0
for i=0, 31 do
local r = 'REG'..tostring(i)
registers[r] = i
all_registers[r] = i
end
local fmt_single = 16 local fmt_single = 16
local fmt_double = 17 local fmt_double = 17
local fmt_word = 20 local fmt_word = 20