mirror of
https://github.com/notwa/lips
synced 2024-11-14 17:39:03 -08:00
423 lines
14 KiB
Lua
423 lines
14 KiB
Lua
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local data = {}
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data.registers = {
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[0]=
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'R0', 'AT', 'V0', 'V1', 'A0', 'A1', 'A2', 'A3',
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'T0', 'T1', 'T2', 'T3', 'T4', 'T5', 'T6', 'T7',
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'S0', 'S1', 'S2', 'S3', 'S4', 'S5', 'S6', 'S7',
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'T8', 'T9', 'K0', 'K1', 'GP', 'SP', 'FP', 'RA',
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}
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data.sys_registers = {
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[0]=
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"INDEX", "RANDOM", "ENTRYLO0", "ENTRYLO1",
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"CONTEXT", "PAGEMASK", "WIRED", "RESERVED0",
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"BADVADDR", "COUNT", "ENTRYHI", "COMPARE",
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"STATUS", "CAUSE", "EPC", "PREVID",
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"CONFIG", "LLADDR", "WATCHLO", "WATCHHI",
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"XCONTEXT", "RESERVED1", "RESERVED2", "RESERVED3",
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"RESERVED4", "RESERVED5", "PERR", "CACHEERR",
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"TAGLO", "TAGHI", "ERROREPC", "RESERVED6",
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}
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data.fpu_registers = {
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[0]=
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'F0', 'F1', 'F2', 'F3', 'F4', 'F5', 'F6', 'F7',
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'F8', 'F9', 'F10', 'F11', 'F12', 'F13', 'F14', 'F15',
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'F16', 'F17', 'F18', 'F19', 'F20', 'F21', 'F22', 'F23',
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'F24', 'F25', 'F26', 'F27', 'F28', 'F29', 'F30', 'F31',
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}
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data.all_directives = {
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'ALIGN', 'SKIP',
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'ASCII', 'ASCIIZ',
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'BYTE', 'HALFWORD', 'WORD', 'FLOAT',
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--'HEX', -- excluded here due to different syntax
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'INC', 'INCASM', 'INCLUDE',
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'INCBIN',
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'ORG',
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}
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data.all_registers = {}
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for k, v in pairs(data.registers) do
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data.all_registers[k] = v
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end
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for k, v in pairs(data.sys_registers) do
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data.all_registers[k + 32] = v
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end
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for k, v in pairs(data.fpu_registers) do
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data.all_registers[k + 64] = v
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end
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-- set up reverse table lookups
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local function revtable(t)
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for k, v in pairs(t) do
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t[v] = k
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end
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end
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revtable(data.registers)
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revtable(data.sys_registers)
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revtable(data.fpu_registers)
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revtable(data.all_registers)
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revtable(data.all_directives)
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-- alternate register names
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data.registers['ZERO'] = 0
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data.all_registers['ZERO'] = 0
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data.registers['S8'] = 30
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data.all_registers['S8'] = 30
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for i=0, 31 do
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local r = 'REG'..tostring(i)
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data.registers[r] = i
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data.all_registers[r] = i
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end
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data.fmt_single = 16
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data.fmt_double = 17
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data.fmt_word = 20
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data.fmt_long = 21
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local __ = {}
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data.instructions = {
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--[[
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data guide:
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--INSTRUCTION_NAME = {opcode, infmt, outfmt, const, fmtconst},
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underscores are translated to dots later.
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opcode: the first 6 bits of the instruction.
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infmt: the input format; one character per argument.
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outfmt: the output format: R-, I-, and J-types are inferred by length.
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const: (optional) the number to replace 'C' with in outfmt.
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fmtconst: (optional) the number to replace 'F' with in outfmt.
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input format guide:
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such and such: expects a...
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d: register for rd
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s: register for rs
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t: register for rt
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D: floating point register for fd
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S: floating point register for fs
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T: floating point register for ft
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X: system register for rd
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Y: system register for rs (unused)
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Z: system register for rt (unused)
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o: constant for offset
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b: register to dereference for base
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r: relative constant or label for offset
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I: constant or label for index (long jump)
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i: immediate (must fit in a halfword; cannot be a label)
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k: immediate to negate (must fit in a halfword; cannot be a label)
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K: signed immediate (-0x8000 <= immediate < 0x10000; cannot be a label)
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output format guide:
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such and such: writes ... at this position
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0: zero (sometimes used to refer to R0)
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d: rd
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s: rs
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t: rt
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D: fd
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S: fs
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T: ft
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o: offset
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b: base
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i: immediate (infmt 'i' and 'k' both write to here)
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I: index
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C: constant (given in argument immediately after)
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F: format constant (given in argument after constant)
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--]]
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J = {2, 'I', 'I'},
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JAL = {3, 'I', 'I'},
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JALR = {0, 'ds', 's0d0C', 9},
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JR = {0, 's', 's000C', 8},
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BREAK = {0, '', '0000C', 13},
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SYSCALL = {0, '', '0000C', 12},
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SYNC = {0, '', '0000C', 15},
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LB = {32, 'tob', 'bto'},
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LBU = {36, 'tob', 'bto'},
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LD = {55, 'tob', 'bto'},
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LDL = {26, 'tob', 'bto'},
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LDR = {27, 'tob', 'bto'},
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LH = {33, 'tob', 'bto'},
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LHU = {37, 'tob', 'bto'},
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LL = {48, 'tob', 'bto'},
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LLD = {52, 'tob', 'bto'},
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LW = {35, 'tob', 'bto'},
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LWL = {34, 'tob', 'bto'},
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LWR = {38, 'tob', 'bto'},
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LWU = {39, 'tob', 'bto'},
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SB = {40, 'tob', 'bto'},
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SC = {56, 'tob', 'bto'},
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SCD = {60, 'tob', 'bto'},
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SD = {63, 'tob', 'bto'},
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SDL = {44, 'tob', 'bto'},
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SDR = {45, 'tob', 'bto'},
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SH = {41, 'tob', 'bto'},
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SW = {43, 'tob', 'bto'},
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SWL = {42, 'tob', 'bto'},
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SWR = {46, 'tob', 'bto'},
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LUI = {15, 'ti', '0ti'},
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MFHI = {0, 'd', '00d0C', 16},
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MFLO = {0, 'd', '00d0C', 18},
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MTHI = {0, 's', 's000C', 17},
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MTLO = {0, 's', 's000C', 19},
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ADDI = { 8, 'tsK', 'sti'},
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ADDIU = { 9, 'tsK', 'sti'},
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ANDI = {12, 'tsK', 'sti'},
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DADDI = {24, 'tsK', 'sti'},
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DADDIU = {25, 'tsK', 'sti'},
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ORI = {13, 'tsi', 'sti'},
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SLTI = {10, 'tsi', 'sti'},
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SLTIU = {11, 'tsi', 'sti'},
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XORI = {14, 'tsi', 'sti'},
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ADD = {0, 'dst', 'std0C', 32},
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ADDU = {0, 'dst', 'std0C', 33},
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AND = {0, 'dst', 'std0C', 36},
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DADD = {0, 'dst', 'std0C', 44},
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DADDU = {0, 'dst', 'std0C', 45},
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DSLLV = {0, 'dst', 'std0C', 20},
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DSUB = {0, 'dst', 'std0C', 46},
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DSUBU = {0, 'dst', 'std0C', 47},
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NOR = {0, 'dst', 'std0C', 39},
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OR = {0, 'dst', 'std0C', 37},
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SLLV = {0, 'dst', 'std0C', 4},
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SLT = {0, 'dst', 'std0C', 42},
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SLTU = {0, 'dst', 'std0C', 43},
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SRAV = {0, 'dst', 'std0C', 7},
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SRLV = {0, 'dst', 'std0C', 6},
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SUB = {0, 'dst', 'std0C', 34},
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SUBU = {0, 'dst', 'std0C', 35},
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XOR = {0, 'dst', 'std0C', 38},
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DDIV = {0, 'st', 'st00C', 30},
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DDIVU = {0, 'st', 'st00C', 31},
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DIV = {0, 'st', 'st00C', 26},
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DIVU = {0, 'st', 'st00C', 27},
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DMULT = {0, 'st', 'st00C', 28},
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DMULTU = {0, 'st', 'st00C', 29},
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MULT = {0, 'st', 'st00C', 24},
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MULTU = {0, 'st', 'st00C', 25},
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DSLL = {0, 'dti', '0tdiC', 56},
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DSLL32 = {0, 'dti', '0tdiC', 60},
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DSRA = {0, 'dti', '0tdiC', 59},
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DSRA32 = {0, 'dti', '0tdiC', 63},
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DSRAV = {0, 'dts', '0tdsC', 23},
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DSRL = {0, 'dti', '0tdiC', 58},
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DSRL32 = {0, 'dti', '0tdiC', 62},
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DSRLV = {0, 'dts', '0tdsC', 22},
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SLL = {0, 'dti', '0tdiC', 0},
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SRA = {0, 'dti', '0tdiC', 3},
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SRL = {0, 'dti', '0tdiC', 2},
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BEQ = { 4, 'str', 'sto'},
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BEQL = {20, 'str', 'sto'},
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BNE = { 5, 'str', 'sto'},
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BNEL = {21, 'str', 'sto'},
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BGEZ = { 1, 'sr', 'sCo', 1},
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BGEZAL = { 1, 'sr', 'sCo', 17},
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BGEZALL = { 1, 'sr', 'sCo', 19},
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BGEZL = { 1, 'sr', 'sCo', 3},
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BGTZ = { 7, 'sr', 'sCo', 0},
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BGTZL = {23, 'sr', 'sCo', 0},
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BLEZ = { 6, 'sr', 'sCo', 0},
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BLEZL = {22, 'sr', 'sCo', 0},
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BLTZ = { 1, 'sr', 'sCo', 0},
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BLTZAL = { 1, 'sr', 'sCo', 16},
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BLTZALL = { 1, 'sr', 'sCo', 18},
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BLTZL = { 1, 'sr', 'sCo', 2},
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-- coprocessor-related instructions
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TEQ = {0, 'st', 'st00C', 52},
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TGE = {0, 'st', 'st00C', 48},
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TGEU = {0, 'st', 'st00C', 49},
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TLT = {0, 'st', 'st00C', 50},
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TLTU = {0, 'st', 'st00C', 51},
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TNE = {0, 'st', 'st00C', 54},
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TEQI = {1, 'si', 'sCi', 12},
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TGEI = {1, 'si', 'sCi', 8},
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TGEIU = {1, 'si', 'sCi', 9},
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TLTI = {1, 'si', 'sCi', 10},
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TLTIU = {1, 'si', 'sCi', 11},
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TNEI = {1, 'si', 'sCi', 14},
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CFC1 = {17, 'tS', 'CtS00', 2},
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CTC1 = {17, 'tS', 'CtS00', 6},
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DMFC1 = {17, 'tS', 'CtS00', 1},
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DMTC1 = {17, 'tS', 'CtS00', 5},
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MFC0 = {16, 'tX', 'Ctd00', 0},
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MFC1 = {17, 'tS', 'CtS00', 0},
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MTC0 = {16, 'tX', 'Ctd00', 4},
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MTC1 = {17, 'tS', 'CtS00', 4},
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LDC1 = {53, 'Tob', 'bTo'},
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LWC1 = {49, 'Tob', 'bTo'},
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SDC1 = {61, 'Tob', 'bTo'},
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SWC1 = {57, 'Tob', 'bTo'},
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-- immediate limited to 3 bits?
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CACHE = {47, 'iob', 'bio'},
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-- misuses 'F' to write the initial bit
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ERET = {16, '', 'F000C', 24, 16},
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TLBP = {16, '', 'F000C', 8, 16},
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TLBR = {16, '', 'F000C', 1, 16},
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TLBWI = {16, '', 'F000C', 2, 16},
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TLBWR = {16, '', 'F000C', 6, 16},
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-- only one condition code on the R4300i?
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BC1F = {17, 'r', 'FCo', 0, 8},
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BC1FL = {17, 'r', 'FCo', 2, 8},
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BC1T = {17, 'r', 'FCo', 1, 8},
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BC1TL = {17, 'r', 'FCo', 3, 8},
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ADD_D = {17, 'DST', 'FTSDC', 0, data.fmt_double},
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ADD_S = {17, 'DST', 'FTSDC', 0, data.fmt_single},
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DIV_D = {17, 'DST', 'FTSDC', 3, data.fmt_double},
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DIV_S = {17, 'DST', 'FTSDC', 3, data.fmt_single},
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MUL_D = {17, 'DST', 'FTSDC', 2, data.fmt_double},
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MUL_S = {17, 'DST', 'FTSDC', 2, data.fmt_single},
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SUB_D = {17, 'DST', 'FTSDC', 1, data.fmt_double},
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SUB_S = {17, 'DST', 'FTSDC', 1, data.fmt_single},
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C_EQ_D = {17, 'ST', 'FTS0C', 50, data.fmt_double},
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C_EQ_S = {17, 'ST', 'FTS0C', 50, data.fmt_single},
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C_F_D = {17, 'ST', 'FTS0C', 48, data.fmt_double},
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C_F_S = {17, 'ST', 'FTS0C', 48, data.fmt_single},
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C_LE_D = {17, 'ST', 'FTS0C', 62, data.fmt_double},
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C_LE_S = {17, 'ST', 'FTS0C', 62, data.fmt_single},
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C_LT_D = {17, 'ST', 'FTS0C', 60, data.fmt_double},
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C_LT_S = {17, 'ST', 'FTS0C', 60, data.fmt_single},
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C_NGE_D = {17, 'ST', 'FTS0C', 61, data.fmt_double},
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C_NGE_S = {17, 'ST', 'FTS0C', 61, data.fmt_single},
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C_NGL_D = {17, 'ST', 'FTS0C', 59, data.fmt_double},
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C_NGL_S = {17, 'ST', 'FTS0C', 59, data.fmt_single},
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C_NGLE_D= {17, 'ST', 'FTS0C', 57, data.fmt_double},
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C_NGLE_S= {17, 'ST', 'FTS0C', 57, data.fmt_single},
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C_NGT_D = {17, 'ST', 'FTS0C', 63, data.fmt_double},
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C_NGT_S = {17, 'ST', 'FTS0C', 63, data.fmt_single},
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C_OLE_D = {17, 'ST', 'FTS0C', 54, data.fmt_double},
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C_OLE_S = {17, 'ST', 'FTS0C', 54, data.fmt_single},
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C_OLT_D = {17, 'ST', 'FTS0C', 52, data.fmt_double},
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C_OLT_S = {17, 'ST', 'FTS0C', 52, data.fmt_single},
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C_SEQ_D = {17, 'ST', 'FTS0C', 58, data.fmt_double},
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C_SEQ_S = {17, 'ST', 'FTS0C', 58, data.fmt_single},
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C_SF_D = {17, 'ST', 'FTS0C', 56, data.fmt_double},
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C_SF_S = {17, 'ST', 'FTS0C', 56, data.fmt_single},
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C_UEQ_D = {17, 'ST', 'FTS0C', 51, data.fmt_double},
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C_UEQ_S = {17, 'ST', 'FTS0C', 51, data.fmt_single},
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C_ULE_D = {17, 'ST', 'FTS0C', 55, data.fmt_double},
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C_ULE_S = {17, 'ST', 'FTS0C', 55, data.fmt_single},
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C_ULT_D = {17, 'ST', 'FTS0C', 53, data.fmt_double},
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C_ULT_S = {17, 'ST', 'FTS0C', 53, data.fmt_single},
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C_UN_D = {17, 'ST', 'FTS0C', 49, data.fmt_double},
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C_UN_S = {17, 'ST', 'FTS0C', 49, data.fmt_single},
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CVT_D_L = {17, 'DS', 'F0SDC', 33, data.fmt_long},
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CVT_D_S = {17, 'DS', 'F0SDC', 33, data.fmt_single},
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CVT_D_W = {17, 'DS', 'F0SDC', 33, data.fmt_word},
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CVT_L_D = {17, 'DS', 'F0SDC', 37, data.fmt_double},
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CVT_L_S = {17, 'DS', 'F0SDC', 37, data.fmt_single},
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CVT_S_D = {17, 'DS', 'F0SDC', 32, data.fmt_double},
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CVT_S_L = {17, 'DS', 'F0SDC', 32, data.fmt_long},
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CVT_S_W = {17, 'DS', 'F0SDC', 32, data.fmt_word},
|
||
|
CVT_W_D = {17, 'DS', 'F0SDC', 36, data.fmt_double},
|
||
|
CVT_W_S = {17, 'DS', 'F0SDC', 36, data.fmt_single},
|
||
|
|
||
|
ABS_D = {17, 'DS', 'F0SDC', 5, data.fmt_double},
|
||
|
ABS_S = {17, 'DS', 'F0SDC', 5, data.fmt_single},
|
||
|
CEIL_L_D= {17, 'DS', 'F0SDC', 10, data.fmt_double},
|
||
|
CEIL_L_S= {17, 'DS', 'F0SDC', 10, data.fmt_single},
|
||
|
CEIL_W_D= {17, 'DS', 'F0SDC', 14, data.fmt_double},
|
||
|
CEIL_W_S= {17, 'DS', 'F0SDC', 14, data.fmt_single},
|
||
|
FLOOR_L_D={17, 'DS', 'F0SDC', 11, data.fmt_double},
|
||
|
FLOOR_L_S={17, 'DS', 'F0SDC', 11, data.fmt_single},
|
||
|
FLOOR_W_D={17, 'DS', 'F0SDC', 15, data.fmt_double},
|
||
|
FLOOR_W_S={17, 'DS', 'F0SDC', 15, data.fmt_single},
|
||
|
MOV_D = {17, 'DS', 'F0SDC', 6, data.fmt_double},
|
||
|
MOV_S = {17, 'DS', 'F0SDC', 6, data.fmt_single},
|
||
|
NEG_D = {17, 'DS', 'F0SDC', 7, data.fmt_double},
|
||
|
NEG_S = {17, 'DS', 'F0SDC', 7, data.fmt_single},
|
||
|
ROUND_L_D={17, 'DS', 'F0SDC', 8, data.fmt_double},
|
||
|
ROUND_L_S={17, 'DS', 'F0SDC', 8, data.fmt_single},
|
||
|
ROUND_W_D={17, 'DS', 'F0SDC', 12, data.fmt_double},
|
||
|
ROUND_W_S={17, 'DS', 'F0SDC', 12, data.fmt_single},
|
||
|
SQRT_D = {17, 'DS', 'F0SDC', 4, data.fmt_double},
|
||
|
SQRT_S = {17, 'DS', 'F0SDC', 4, data.fmt_single},
|
||
|
TRUNC_L_D={17, 'DS', 'F0SDC', 9, data.fmt_double},
|
||
|
TRUNC_L_S={17, 'DS', 'F0SDC', 9, data.fmt_single},
|
||
|
TRUNC_W_D={17, 'DS', 'F0SDC', 13, data.fmt_double},
|
||
|
TRUNC_W_S={17, 'DS', 'F0SDC', 13, data.fmt_double},
|
||
|
|
||
|
-- pseudo-instructions
|
||
|
|
||
|
B = {4, 'r', '00o'}, -- BEQ R0, R0, offset
|
||
|
BAL = {1, 'r', '0Co', 17}, -- BGEZAL R0, offset
|
||
|
BEQZ = {4, 'sr', 's0o'}, -- BEQ RS, R0, offset
|
||
|
BNEZ = {5, 'sr', 's0o'}, -- BNE RS, R0, offset
|
||
|
CL = {0, 'd', '00d0C', 37}, -- OR RD, R0, R0
|
||
|
MOV = {0, 'ds', 's0d0C', 37}, -- OR RD, RS, R0
|
||
|
NEG = {0, 'dt', '0td0C', 34}, -- SUB RD, R0, RT
|
||
|
NOP = {0, '', '0'}, -- SLL R0, R0, 0
|
||
|
NOT = {0, 'ds', 's0d0C', 39}, -- NOR RD, RS, R0
|
||
|
SUBI = {8, 'tsk', 'sti'}, -- ADDI RT, RS, -immediate
|
||
|
SUBIU = {9, 'tsk', 'sti'}, -- ADDIU RT, RS, -immediate
|
||
|
|
||
|
-- ...that expand to multiple instructions
|
||
|
LI = __, -- only one instruction for values < 0x10000
|
||
|
LA = __,
|
||
|
|
||
|
-- variable arguments
|
||
|
PUSH = __,
|
||
|
POP = __,
|
||
|
JPOP = __,
|
||
|
|
||
|
ABS = __, -- BGEZ NOP SUBU?
|
||
|
MUL = __, -- MULT MFLO
|
||
|
--DIV = __, -- 3 arguments
|
||
|
REM = __, -- 3 arguments
|
||
|
|
||
|
NAND = __, -- AND, NOT
|
||
|
NANDI = __, -- ANDI, NOT
|
||
|
NORI = __, -- ORI, NOT
|
||
|
ROL = __, -- SLL, SRL, OR
|
||
|
ROR = __, -- SRL, SLL, OR
|
||
|
|
||
|
SEQ = __, SEQI = __, SEQIU = __, SEQU = __,
|
||
|
SGE = __, SGEI = __, SGEIU = __, SGEU = __,
|
||
|
SGT = __, SGTI = __, SGTIU = __, SGTU = __,
|
||
|
SLE = __, SLEI = __, SLEIU = __, SLEU = __,
|
||
|
SNE = __, SNEI = __, SNEIU = __, SNEU = __,
|
||
|
|
||
|
BEQI = __,
|
||
|
BNEI = __,
|
||
|
BGE = __, BGEI = __,
|
||
|
BLE = __, BLEI = __,
|
||
|
BLT = __, BLTI = __,
|
||
|
BGT = __, BGTI = __,
|
||
|
}
|
||
|
|
||
|
data.all_instructions = {}
|
||
|
local i = 1
|
||
|
for k, v in pairs(data.instructions) do
|
||
|
data.all_instructions[k:gsub('_', '.')] = i
|
||
|
i = i + 1
|
||
|
end
|
||
|
revtable(data.all_instructions)
|
||
|
|
||
|
return data
|