handle timer interrupts and clean up kernel a bit
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2e99cf982a
commit
2a53db6095
5 changed files with 23 additions and 24 deletions
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@ -7,7 +7,7 @@ constant K_DUMP(0x0400) // we save registers and state here
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constant K_REASON(0x0600)
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constant K_CAUSE(0x0604)
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constant K_STATUS(0x0608)
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constant K_IN_ISR(0x060C)
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constant K_UNUSED(0x060C)
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constant K_EPC(0x0610)
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constant K_ERRORPC(0x0614)
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constant K_BADVADDR(0x0618)
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@ -44,7 +44,6 @@ constant CP0_STATUS_IM5($2000) // Interrupt Mask 5 (External)
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constant CP0_STATUS_IM6($4000) // Interrupt Mask 6 (External)
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constant CP0_STATUS_IM7($8000) // Interrupt Mask 7 (External)
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constant CP0_STATUS_IM_ALL($FF00) // all interrupt masks
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constant CP0_STATUS_IM_WANTED($7F00) // FIXME: just the interrupts we can deal with
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// note that these are all masks.
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constant CP0_CAUSE_CODE($007C) // actually supposed to be called ExcCode
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@ -20,7 +20,7 @@ macro SetIntMask() {
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sw t0, MI_INTR_MASK(a0)
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// careful not to touch unrelated flags here
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mfc0 t1, CP0_Status
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lli t0, CP0_STATUS_IM_WANTED
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lli t0, CP0_STATUS_IM_ALL
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or t1, t0
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mtc0 t1, CP0_Status
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}
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2
init.asm
2
init.asm
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@ -98,7 +98,7 @@
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// enable CPU interrupts.
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mfc0 t1, CP0_Status
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ori t1, CP0_STATUS_IM_WANTED | CP0_STATUS_IE
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ori t1, CP0_STATUS_IM_ALL | CP0_STATUS_IE
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mtc0 t1, CP0_Status
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// enable even more interrupts.
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40
kernel.asm
40
kernel.asm
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@ -21,7 +21,7 @@ include "init.asm"
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// or just DMA in the ISR and our defaults from ROM...
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sw r0, K_64DRIVE_MAGIC(gp)
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sw r0, K_REASON(gp)
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sw r0, K_IN_ISR(gp)
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sw r0, K_UNUSED(gp)
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sw r0, K_CONSOLE_AVAILABLE(gp)
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sw r0, K_HISTORY(gp)
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@ -29,7 +29,7 @@ Drive64Init:
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lui t9, CI_BASE
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lui t2, 0x5544 // "UD" of "UDEV"
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lw t1, CI_HW_MAGIC(t9)
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ori t2, t2, 0x4556 // "EV" of "UDEV"
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ori t2, 0x4556 // "EV" of "UDEV"
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beq t1, t2, Drive64Confirmed
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nop
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@ -78,12 +78,12 @@ evaluate x({x} + 8)
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WipeRegisters:
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// load up most registers with a dummy value for debugging
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lui at, 0xCAFE
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ori at, at, 0xBABE
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ori at, 0xBABE
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dsll at, 16
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// attempting to use this as an address should trigger an interrupt
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ori at, at, 0xDEAD
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ori at, 0xDEAD
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dsll at, 16
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ori at, at, 0xBEEF
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ori at, 0xBEEF
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// k0, k1, sp intentionally absent
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daddu v0, at, r0
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@ -218,12 +218,6 @@ InterruptHandler:
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mfc0 k1, CP0_BadVAddr
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sw k1, K_BADVADDR(k0)
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// prevent recursive interrupts if ISR_Main somehow causes an interrupt
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// lw t1, K_IN_ISR(k0)
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// bnez t1, ISR_Exit // TODO: reimplement properly
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lli t0, 1
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sw t0, K_IN_ISR(k0)
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// be wary, this is a tiny temporary stack!
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ori sp, k0, K_STACK
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@ -233,6 +227,15 @@ ISR_Main: // free to modify any GPR from here to ISR_Exit
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KWriteString(KS_Handling)
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KWriteString(KS_Code)
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// handle timer interrupt
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lw t0, K_CAUSE(k0)
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andi t0, CP0_CAUSE_IP7
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beqz t0, ISR_CountDone
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nop
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KWriteString(KS_Timer)
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mtc0 r0, CP0_Compare
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ISR_CountDone:
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// switch-case on the cause code:
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// conveniently, the ExcCode in Cause is already shifted left by 2.
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lw t4, K_CAUSE(k0)
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@ -277,8 +280,6 @@ if K_DEBUG {
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}
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ISR_Exit:
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sw r0, K_IN_ISR(k0)
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lui k0, K_BASE
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ld t0, K_DUMP+0x100(k0)
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ld t1, K_DUMP+0x108(k0)
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@ -369,12 +370,10 @@ K_MI_Loop:
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K_MI_SP:
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KWriteString(KS_MI_SP)
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lli t0, SP_RSPSIGNAL_CLR | SP_INT_CLR
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lli t0, SP_INT_CLR
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lui a1, SP_BASE
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sw t0, SP_STATUS(a1)
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// then check andi t1, SP_YIELDED | SP_TASKDONE ?
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lw t0, K_HISTORY(k0)
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ori t0, MI_INTR_SP
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sw t0, K_HISTORY(k0)
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@ -396,9 +395,8 @@ K_MI_SI:
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K_MI_AI:
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KWriteString(KS_MI_AI)
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lli t0, 0x01
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lui a1, AI_BASE
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sw t0, AI_STATUS(a1)
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sw r0, AI_STATUS(a1)
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lw t0, K_HISTORY(k0)
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ori t0, MI_INTR_AI
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@ -410,7 +408,8 @@ K_MI_VI:
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KWriteString(KS_MI_VI)
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lui a1, VI_BASE
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sw r0, VI_V_CURRENT_LINE(a1)
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lw t0, VI_V_CURRENT_LINE(a1)
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sw t0, VI_V_CURRENT_LINE(a1)
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lw t0, K_HISTORY(k0)
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ori t0, MI_INTR_VI
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@ -434,7 +433,7 @@ K_MI_PI:
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K_MI_DP:
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KWriteString(KS_MI_DP)
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lli t0, 0x800
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lli t0, 0x0800
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lui a1, MI_BASE
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sw t0, MI_INIT_MODE(a1)
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@ -528,6 +527,7 @@ KSL(KS_Code29, "RESERVED 29")
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KSL(KS_Code30, "RESERVED 30")
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KSL(KS_Code31, "RESERVED 31")
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KSL(KS_Timer, " * Timer Interrupt")
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KSL(KS_MI_SP, " * Signal Processor Interrupt")
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KSL(KS_MI_SI, " * Serial Interface Interrupt")
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KSL(KS_MI_AI, " * Audio Interface Interrupt")
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