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README.md
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README.md
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# lips
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An assembler for the MIPS R4300i architecture, written in Lua.
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An assembler for the MIPS R4300i processor, written in Lua.
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This is not a 'true' assembler; it won't produce executable binary files.
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This was intended to assist in hacking N64 games.
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It does little more than output hex.
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Not for production. Much of the code and syntax is untested and likely to change.
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Not for production.
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Much of the code and syntax is untested and likely to change.
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Even this README is incomplete.
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## Usage
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Copy the lips directory to somewhere Lua's `package.path` can find it.
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If you're using it locally, you will need to write something like:
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Install the lips directory to somewhere Lua's `package.path` can find it.
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If you're using it locally, you'll either need to write something like:
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```
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package.path = package.path..";?/init.lua"
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```
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@ -37,57 +38,85 @@ By default, lips will print the assembled word values in hex:
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etc...
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```
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Other predefined output formats are available in [lips.writers];
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you can instantiate one and pass it through the second argument of lips.
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Since lips is designed to assist with ROM/RAM hacking,
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it cannot produce executable files on its own.
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Instead, it is meant to be integrated with an existing executable or memory dump.
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Instead, it is meant to be integrated with
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an existing executable or memory dump.
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For instance, consider [this injection routine][inject.lua]
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written for the Nintendo 64 Zelda games.
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[writers]: https://github.com/notwa/lips/blob/master/lips/writers.lua
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[inject.lua]: https://github.com/notwa/mm/blob/master/Lua/inject.lua
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## Syntax
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lips uses a derivative of [CajeASM's][caje] syntax.
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It takes a couple notes from more traditional assemblers as well.
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It takes a couple of notes from other assemblers as well.
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[caje]: https://github.com/Tarek701/CajeASM/
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A run-down of various syntax elements:
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```asm
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// this is a comment
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// this is a comment.
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/* this is a block comment */
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; this is a more traditional assembly style of comment
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; we'll be using this so github's syntax highlighting doesn't blow up
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; this is a more traditional assembly style of comment.
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; we'll be using this so github's syntax highlighting doesn't blow up.
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; this is comparible to C's #define my_const 0xDEADBEEF
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; set a variable. these are inlined in the preprocessing stage.
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[my_const]: 0xDEADBEEF
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; we can then use it in instructions by adding a @ prefix
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; we can then use it in instructions by adding a @ prefix:
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li a0, @my_const
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; whitespace is optional
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; whitespace is optional.
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li a0,@myconst
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; commas can be optional too,
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; but this feature will likely be removed in the future.
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li a0 @myconst
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; instruction/register names are case-insensitive, as are hex digits
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; instructions may end in an extra comma;
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; this may make mass-entry or generation of instructions easier.
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li a0, @my_const,
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; instruction/register names are case-insensitive, as are hex digits.
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LI A0, @my_const
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LuI a0, 0xDeAd
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; however, note that the 'x' in "0x" must be lowercase.
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; the same applies for 0b and 0o for binary and octal, respectively.
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; coprocessor 0 registers are case-insensitive as well,
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; though this may change in the future.
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mfc0 a1, CouNT
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; labels are defined with a colon and referenced without prefix, as such:
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; labels are defined with a colon, and referenced without a prefix, as such:
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my_label:
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b my_label
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nop
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; directives are prefixed with a dot.
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; also, labels may be used in .word directives.
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.word my_label, 1, 2, 3, 0x4567
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; octal numbers are supported
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.short 0177, 0404
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; numbers may be written in eight different ways: two for each base.
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li t1, 0xDEADBEEF
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li t2, $DEADBEEF
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li t3, %11011110101011011011111011101111
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li t4, 0b11011110101011011011111011101111
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li t5, 0o33653337357
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li t6, 033653337357
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li t7, 3735928559
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li t8, #3735928559
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; though, as a stylistic choice, the preferred way of writing them are as such:
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li t1, 0xDEADBEEF
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li t4, 0b11011110101011011011111011101111
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li t5, 0o33653337357
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li t7, 3735928559
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.align ; implied argument of 2, for a 2**n=4 byte alignment
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; loading and storing can be written in several ways (addressing modes)
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; loading and storing can be written in several ways (addressing modes):
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lw s0, label
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lw s1, (s0)
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lw s2, 256(s0)
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sw s2, label+4
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sw s3, label+4(s0)
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; relative labels, borrowed from asw (except ours require a suffixing colon)
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-:
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b ++
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; relative labels are borrowed from asw, except ours require a suffixing colon:
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-: : #1
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b ++ ; branches to #3
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nop
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+:
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-:
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b --
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-: ; #2
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b -- ; branches to #1
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nop
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+:
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b -
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+: : #3
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b - ; branches to #2
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nop
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; TODO: more examples!
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## Instructions
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Instructions were primarily referenced from [the N64 Toolkit: Opcodes.][n64op]
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Instructions were primarily referenced from [the N64 Toolkit: Opcodes][n64op]
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and the [bass assembler.][basstables]
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An in-depth look at instructions for MIPS IV processors
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is given by [the MIPS IV Instruction Set manual.][mipsiv]
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[The MIPS64 Instruction Set manual][mips64] is sometimes useful.
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Much of it doesn't apply to our older MIPS III architecture,
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but it's a little cleaner than the older manual.
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but it's a little cleaner than the older manuals.
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There's also a brief and incomplete [overview of MIPS instructions.][overview]
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First-time writers of MIPS assembly may find this the most useful.
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Last, but not least, [the R4300i datasheet][r4300i] covers
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some of the nuances of the processor.
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[n64op]: https://github.com/mikeryan/n64dev/tree/master/docs/n64ops
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[basstables]: https://github.com/ARM9/bass/tree/master/bass/arch/table/mipseb
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[mipsiv]: http://www.cs.cmu.edu/afs/cs/academic/class/15740-f97/public/doc/mips-isa.pdf
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[mips64]: http://scc.ustc.edu.cn/zlsc/lxwycj/200910/W020100308600769158777.pdf
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[overview]: http://www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSir.html
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[r4300i]: http://www.futuretech.blinkenlights.nl/R4300_datasheet.Rev0.3.pdf
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### Unimplemented
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### Unimplemented Instructions
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As far as I know, all native R4300i instructions have been implemented.
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Whether or not they output the proper machine code is another thing.
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### Unimplemented Pseudo-Instructions
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Besides implicit arguments for existing instructions, there are:
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* MUL, DIV, REM
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* ABS, MUL, DIV, REM
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* BGE, BLE, BLT, BGT
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* any Set (Condition) \[Immediate\] \[Unsigned\] pseudo-instructions
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* many Set/Branch pseudo-instructions
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## Registers
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In order of numerical value, with intended usage:
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* R0: always zero; cannot be written to. 'zero' is an acceptable alias.
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* R0: always zero; cannot be changed. 'zero' is an acceptable alias.
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* AT: assembler temporary. used by various pseudo-instructions.
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user may use freely if they're wary.
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this allows you to have a PC value different from origin:
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`PC = origin + base`
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* `.push {vars...}` `.pop {vars...}'
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* `.push {vars...}`
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`.pop {vars...}'
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pushes or pops variables with an internal stack.
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supported variables: org, base, pc.
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### Unimplemented
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* FLOAT: writes a list of 32-bit floating point numbers until end-of-line.
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this may not get implemented due to a lack of aliasing in vanilla Lua,
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and thus accuracy issues.
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* `.float {numbers..}`
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`.double {numbers..}`
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writes a list of 32-bit/64-bit floating point numbers until end-of-line.
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this may not get implemented in vanilla Lua due to a lack of aliasing.
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