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https://github.com/notwa/lips
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cleanup and documenting; alias S8 register to FP
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2 changed files with 182 additions and 22 deletions
123
README.md
123
README.md
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@ -3,3 +3,126 @@
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An assembler for the MIPS R4300i architecture, written in Lua.
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Not for production. Much of the code is untested and likely to change.
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Even this README is incomplete.
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## Syntax
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TODO
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## Instructions
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[refer to these instruction documents.][instrdocs]
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[instrdocs]: https://github.com/mikeryan/n64dev/tree/master/docs/n64ops
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### Unimplemented
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* CACHE
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* ERET
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* TLBP, TLBR, TLBWI, TLBWR
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* BC1F, BC1FL, BC1T, BC1TL
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### Unimplemented Pseudo-Instructions
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Besides implied arguments for existing instructions, there are:
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* ABS, MUL, DIV, REM
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* NAND, NANDI, NORI, ROL, ROR
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* SEQ, SEQI, SEQIU, SEQU
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* SGE, SGEI, SGEIU, SGEU
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* SGT, SGTI, SGTIU, SGTU
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* SLE, SLEI, SLEIU, SLEU
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* SNE, SNEI, SNEIU, SNEU
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* BEQI, BNEI, BGE, BGEI, BLE, BLEI, BLT, BLTI, BGT, BGTI
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## Registers
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In order of numerical value, with intended usage:
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* R0: always zero; cannot be written to. 'zero' is an acceptable alias.
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* AT: assembler temporary. used by various pseudo-instructions.
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user may use freely if they're wary.
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* V0, V1: subroutine return values.
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* A0 A1 A2 A3: subroutine arguments.
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* T0 T1 T2 T3 T4 T5 T6 T7: temporary registers.
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* S0 S1 S2 S3 S4 S5 S6 S7: saved registers.
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* T8 T9: more temporary registers.
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* K0 K1: kernel registers. not recommended to use outside of kernel code.
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* GP: global pointer.
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* SP: stack pointer.
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* FP: frame pointer. 'S8' is an acceptable alias.
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* RA: subroutine return address.
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* REG#: whereas # is a decimal number from 0 to 31.
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aliased to the appropriate register. eg: REG0 is R0, REG1 is at, REG2 is V0.
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* f#: coproccesor 1 registers, whereas # is a decimal number from 0 to 31.
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### Unimplemented
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all coprocessor 0 registers:
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```
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Index, Random, EntryLo0, EntryLo1,
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Context, PageMask, Wired, RESERVED,
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BadVAddr, Count, EntryHi, Compare,
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Status, Cause, ExceptionPC, PRId,
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Config, LLAddr, WatchLo, WatchHi,
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XContext, RESERVED, RESERVED, RESERVED,
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RESERVED, RESERVED, RESERVED, CacheErr,
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TagLo, TagHi, ErrorEPC, RESERVED
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```
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## Directives
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* BYTE: writes a list of 8-bit numbers until end-of-line.
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be wary of potential alignment issues.
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* HALFWORD: writes a list of 16-bit numbers until end-of-line.
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be wary of potential alignment issues.
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* WORD: writes a list of 32-bit numbers until end-of-line.
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* SKIP: takes one or two arguments.
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* ORG: change the current address for writing to; seeking.
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for now, this is untested and likely to cause performance issues.
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### Unimplemented
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* ALIGN: takes one or two arguments.
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unlike some other assemblers,
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ALIGN only affects the first immediately following datum.
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* FLOAT: writes a list of 32-bit floating point numbers until end-of-line.
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this may not get implemented due to a lack of aliasing in vanilla Lua,
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and thus accuracy issues.
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* ASCII: writes a string using its characters' ASCII values.
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* ASCIIZ: same as ASCII, but with a null byte added to the end.
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* INC, INCASM, INCLUDE: include an external assembly file as-is at this position.
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* INCBIN: write an external binary file as-is at this position.
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81
lips.lua
81
lips.lua
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@ -1,11 +1,11 @@
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-- i've lost control of my life
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-- lips.lua
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-- instructions: https://github.com/mikeryan/n64dev/tree/master/docs/n64ops
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-- lexer and parser are somewhat based on http://chunkbake.luaforge.net/
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local assembler = {
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_DESCRIPTION = 'Assembles MIPS assembly files for the R4300i CPU.',
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_URL = 'https://github.com/notwa/mm/blob/master/Lua/inject/assembler.lua',
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_URL = 'https://github.com/notwa/lips/',
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_LICENSE = [[
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Copyright (C) 2015 Connor Olding
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@ -35,7 +35,7 @@ local registers = {
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'R0', 'AT', 'V0', 'V1', 'A0', 'A1', 'A2', 'A3',
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'T0', 'T1', 'T2', 'T3', 'T4', 'T5', 'T6', 'T7',
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'S0', 'S1', 'S2', 'S3', 'S4', 'S5', 'S6', 'S7',
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'T8', 'T9', 'K0', 'K1', 'GP', 'SP', 'S8', 'RA',
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'T8', 'T9', 'K0', 'K1', 'GP', 'SP', 'FP', 'RA',
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}
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local fpu_registers = {
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@ -78,6 +78,8 @@ revtable(all_directives)
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registers['ZERO'] = 0
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all_registers['ZERO'] = 0
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registers['S8'] = 30
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all_registers['S8'] = 30
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for i=0, 31 do
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local r = 'REG'..tostring(i)
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@ -90,7 +92,50 @@ local fmt_double = 17
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local fmt_word = 20
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local fmt_long = 21
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local instruction_handlers = {
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local instructions = {
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--[[
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data guide:
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--INSTRUCTION_NAME = {opcode, infmt, outfmt, const, fmtconst},
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underscores are translated to dots later.
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opcode: the first 6 bits of the instruction.
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infmt: the input format; one character per argument.
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outfmt: the output format: R-, I-, and J-types are inferred by length.
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const: (optional) the number to replace 'C' with in outfmt.
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fmtconst: (optional) the number to replace 'F' with in outfmt.
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input format guide:
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such and such: expects a...
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d: register for rd
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s: register for rs
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t: register for rt
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D: floating point register for fd
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S: floating point register for fs
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T: floating point register for ft
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o: constant for offset (uses lower halfword)
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b: register to dereference for base
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r: relative constant or label (uses lower halfword)
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i: immediate (must fit in a halfword)
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I: constant or label for index (long jump)
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j: immediate (uses lower halfword)
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J: immediate (uses upper halfword)
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k: immediate to negate (must fit in a halfword)
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output format guide:
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such and such: writes ... at this position
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0: zero (sometimes used to refer to R0)
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d: rd
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s: rs
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t: rt
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D: fd
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S: fs
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T: ft
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o: offset
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b: base
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i: immediate (infmt 'i', 'j', 'J', and 'k' all write to here)
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C: constant (given in argument immediately after)
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F: format constant (given in argument after constant)
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--]]
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J = {2, 'I', 'I'},
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JAL = {3, 'I', 'I'},
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@ -144,12 +189,6 @@ local instruction_handlers = {
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SLTIU = {11, 'tsj', 'sti'},
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XORI = {14, 'tsj', 'sti'},
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-- first 6 bits of instruction
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-- | input format
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-- | | output format
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-- | | | const (only if used in output)
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-- | | | | format-const (only if used in output)
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-- | |____ |______ |_ |_
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ADD = {0, 'dst', 'std0C', 32},
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ADDU = {0, 'dst', 'std0C', 33},
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AND = {0, 'dst', 'std0C', 36},
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@ -392,7 +431,7 @@ local instruction_handlers = {
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local all_instructions = {}
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local i = 1
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for k, v in pairs(instruction_handlers) do
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for k, v in pairs(instructions) do
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all_instructions[k:gsub('_', '.')] = i
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i = i + 1
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end
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@ -867,15 +906,15 @@ end
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function Parser:instruction()
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local name = self.tok
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local h = instruction_handlers[name]
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local h = instructions[name]
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self:advance()
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if h == nil then
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self:error('undefined instruction')
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elseif h == 'LI' or h == 'LA' then
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local lui = instruction_handlers['LUI']
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local addi = instruction_handlers['ADDI']
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local ori = instruction_handlers['ORI']
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local lui = instructions['LUI']
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local addi = instructions['ADDI']
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local ori = instructions['ORI']
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local args = {}
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args.rt = self:register()
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self:optional_comma()
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self:format_out(addi[3], addi[1], args, addi[4], addi[5])
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end
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elseif h[2] == 'tob' then -- or h[2] == 'Tob' then
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local lui = instruction_handlers['LUI']
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local lui = instructions['LUI']
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local args = {}
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args.rt = self:register()
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self:optional_comma()
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@ -1042,9 +1081,6 @@ function Dumper:add_instruction_r(o, s, t, d, f, c)
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self:push_instruction{o, s, t, d, f, c}
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end
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function Dumper:define(name, number)
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end
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function Dumper:add_label(name)
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self.labels[name] = self.pos
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end
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@ -1260,9 +1296,9 @@ function Dumper:dump()
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end
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local function assemble(fn_or_asm, writer)
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-- assemble MIPS R4300i assembly code
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-- if fn_or_asm contains a newline; treat as assembly, otherwise load file
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-- returns error message on error, or nil on success
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-- assemble MIPS R4300i assembly code.
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-- if fn_or_asm contains a newline; treat as assembly, otherwise load file.
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-- returns error message on error, or nil on success.
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fn_or_asm = tostring(fn_or_asm)
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writer = writer or io.write
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@ -1301,6 +1337,7 @@ return setmetatable(assembler, {
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registers = registers,
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fpu_registers = fpu_registers,
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all_registers = all_registers,
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instructions = instructions,
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all_instructions = all_instructions,
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all_directives = all_directives,
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})
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