diff --git a/inc/n64_sp.inc b/inc/n64_sp.inc
index b6ef3c7..bf0fc52 100644
--- a/inc/n64_sp.inc
+++ b/inc/n64_sp.inc
@@ -17,13 +17,13 @@ constant SP_PC($00)        // $04080000..$04080003 SP: PC Register
 constant SP_IBIST_REG($04) // $04080004..$04080007 SP: IMEM BIST Register
 
 // SP_STATUS Read Flags:
-constant SP_HLT($0001) // Halt
-constant SP_BRK($0002) // Break
-constant SP_BSY($0004) // DMA Busy
-constant SP_FUL($0008) // DMA Full
-constant SP_IOF($0010) // IO Full
-constant SP_STP($0020) // Single Step
-constant SP_IOB($0040) // Interrupt On Break
+constant SP_HALT($0001)
+constant SP_BREAK($0002)
+constant SP_BUSY($0004) // DMA busy
+constant SP_FULL($0008) // DMA full
+constant SP_IO_FULL($0010)
+constant SP_SINGLE_STEP($0020)
+constant SP_INT_ON_BREAK($0040) // Interrupt On Break
 constant SP_SG0($0080) // Signal 0 Set
 constant SP_SG1($0100) // Signal 1 Set
 constant SP_SG2($0200) // Signal 2 Set
@@ -34,15 +34,15 @@ constant SP_SG6($2000) // Signal 6 Set
 constant SP_SG7($4000) // Signal 7 Set
 
 // SP_STATUS Write Flags:
-constant SP_HLT_CLR($00000001) // Clear Halt
-constant SP_HLT_SET($00000002) //   Set Halt
-constant SP_BRK_CLR($00000004) // Clear Broke
+constant SP_HALT_CLR($00000001)
+constant SP_HALT_SET($00000002)
+constant SP_BREAK_CLR($00000004) // Clear Broke
 constant SP_INT_CLR($00000008) // Clear Interrupt
 constant SP_INT_SET($00000010) //   Set Interrupt
-constant SP_STP_CLR($00000020) // Clear Single Step
-constant SP_STP_SET($00000040) //   Set Single Step
-constant SP_IOB_CLR($00000080) // Clear Interrupt On Break
-constant SP_IOB_SET($00000100) //   Set Interrupt On Break
+constant SP_SINGLE_STEP_CLR($00000020)
+constant SP_SINGLE_STEP_SET($00000040)
+constant SP_INT_ON_BREAK_CLR($00000080) // Clear Interrupt On Break
+constant SP_INT_ON_BREAK_SET($00000100) //   Set Interrupt On Break
 constant SP_SG0_CLR($00000200) // Clear Signal 0
 constant SP_SG0_SET($00000400) //   Set Signal 0
 constant SP_SG1_CLR($00000800) // Clear Signal 1
@@ -60,33 +60,21 @@ constant SP_SG6_SET($00400000) //   Set Signal 6
 constant SP_SG7_CLR($00800000) // Clear Signal 7
 constant SP_SG7_SET($01000000) //   Set Signal 7
 
-macro SP_DMA_WAIT() { // from CPU
-    lui     t5, SP_BASE
--
-    lw      t0, SP_DMA_FULL(t5)
-    bnez    t0,-
-    nop
--
-    lw      t0, SP_DMA_BUSY(t5)
-    bnez    t0,-
-    nop
-}
-
-macro SP_BUSY_WAIT() {
+macro SP_DMA_WAIT() {
     lui     a0, SP_BASE
 -
     lw      t0, SP_STATUS(a0)
-    andi    t0, 0x1C
+    andi    t0, SP_IO_FULL | SP_BUSY | SP_FULL
     sltu    t0, r0, t0
     bnez    t0,-
     nop
 }
 
-macro SP_WAIT() {
+macro SP_HALT_WAIT() {
     lui     a0, SP_BASE
 -
     lw      t0, SP_STATUS(a0)
-    andi    t0, 1
+    andi    t0, SP_HALT
     beqz    t0,-
     nop
 }
diff --git a/main.asm b/main.asm
index 421f6a6..a5e2105 100644
--- a/main.asm
+++ b/main.asm
@@ -24,11 +24,12 @@ include "kernel.asm"
 
 Main:
     lui     s0, MAIN_BASE
+
+if 0 {
     nop; nop; nop; nop
     mfc0    t0, CP0_Count
     sw      t0, MAIN_COUNTS+0(s0)
 
-if 0 {
     // decompress our picture
     la      a0, LZ_BAKU + 4
     lw      a3, -4(a0) // load uncompressed size from the file itself
@@ -36,7 +37,6 @@ if 0 {
     li      a2, VIDEO_C_IMAGE
     jal     LzDecomp
     nop
-}
 
     mfc0    t0, CP0_Count
     nop; nop; nop; nop
@@ -48,6 +48,7 @@ if 0 {
 
     jal     PokeDataCache
     nop
+}
 
     lui     a0, MAIN_BASE
     lli     a1, 0x20
@@ -81,10 +82,10 @@ Start3D:
 
     // prepare RSP
     lui     a0, SP_BASE
-    lli     t0, SP_SG2_CLR | SP_SG1_CLR | SP_SG0_CLR | SP_IOB_SET
+    lli     t0, SP_SG2_CLR | SP_SG1_CLR | SP_SG0_CLR | SP_INT_ON_BREAK_SET
     sw      t0, SP_STATUS(a0)
 
-    SP_WAIT()
+    SP_HALT_WAIT()
 
     // set RSP PC to IMEM+$0
     lui     a0, SP_PC_BASE
@@ -95,23 +96,25 @@ Start3D:
     jal     PushVideoTask
     ori     a0, a0, MAIN_SP_TASK
 
-    SP_BUSY_WAIT()
+    SP_DMA_WAIT()
 
     jal     LoadRSPBoot
     nop
 
-    SP_BUSY_WAIT()
+    SP_DMA_WAIT()
 
     // clear all flags that would halt RSP (i.e. tell it to run!)
     lui     a0, SP_BASE
-    lli     t0, SP_IOB_SET | SP_STP_CLR | SP_BRK_CLR | SP_HLT_CLR
+    lli     t0, SP_INT_ON_BREAK_SET | SP_SINGLE_STEP_CLR | SP_BREAK_CLR | SP_HALT_CLR
     sw      t0, SP_STATUS(a0)
     nop
 
     SetIntMask()
 
 MainLoop:
-    SP_WAIT()
+    SP_HALT_WAIT()
+
+    WriteString(SPreFrame)
 
     // wait on VI too
 -
@@ -139,6 +142,7 @@ SwitchToAlt:
     j       Start3D
     lli     s1, 1
 
+KSL(SPreFrame, "now waiting for VI")
 KSL(SNewFrame, "next frame")
 
 SetupScreen:
@@ -206,11 +210,12 @@ PushVideoTask:
 
 PushRSPTask:
     lli     t3, 0x40 - 1 // DMA quirk
-    SP_DMA_WAIT() // clobbers t0, t5
+    or      t4, a0, r0
+    SP_DMA_WAIT() // clobbers t0, a0
     la      t1, 0xA4000FC0
-    sw      t1, SP_MEM_ADDR(t5)
-    sw      a0, SP_DRAM_ADDR(t5)
-    sw      t3, SP_RD_LEN(t5) // pull data from RDRAM into DMEM/IMEM
+    sw      t1, SP_MEM_ADDR(a0)
+    sw      t4, SP_DRAM_ADDR(a0)
+    sw      t3, SP_RD_LEN(a0) // pull data from RDRAM into DMEM/IMEM
     jr      ra
     nop
 
@@ -218,11 +223,11 @@ LoadRSPBoot:
     la      t2, UCODE_BOOT & ADDR_MASK
     li      t3, UCODE_BOOT.size
     subiu   t3, t3, 1 // DMA quirk
-    SP_DMA_WAIT() // clobbers t0, t5
+    SP_DMA_WAIT() // clobbers t0, a0
     la      t1, 0xA4001000
-    sw      t1, SP_MEM_ADDR(t5)
-    sw      t2, SP_DRAM_ADDR(t5)
-    sw      t3, SP_RD_LEN(t5) // pull data from RDRAM into DMEM/IMEM
+    sw      t1, SP_MEM_ADDR(a0)
+    sw      t2, SP_DRAM_ADDR(a0)
+    sw      t3, SP_RD_LEN(a0) // pull data from RDRAM into DMEM/IMEM
     jr      ra
     nop